Test Engineer
Quick Summary
Design ATE (Automatic Test Equipment) hardware interface boards (FT and Probe). Debug characterizing silicon on ATE, correlate results with bench data. Analyze silicon results and setting test limits.
Master’s degree in Electronic Engineering OR Bachelor of Science degree in Electronic Engineering with 3 years of experience in test development engineering in semiconductor industry.
Texas Instruments (TI) is seeking a Test Engineer for a full-time role in Santa Clara, California. Test is a crucial time in an IC development process; if you find a bug or an issue, it is a good time to fix it, but every additional second of testing we do, is additional cost when you scale a device into production. So, test engineers must identify the critical points of the device where testing is most necessary and the points where we may want to take some risk. It is a precise balance, that has the potential to save our businesses millions of dollars!
Responsibilities
~1 min read- →Design ATE (Automatic Test Equipment) hardware interface boards (FT and Probe).
- →Debug characterizing silicon on ATE, correlate results with bench data.
- →Analyze silicon results and setting test limits.
- →Work with design team to understand design specifications.
- →Generate test plan, create ATE samples, Qual, char and production test programs.
- →Perform statistical analysis of yield fallout, debug and fix yield issues; optimize test time.
- →Work with production team across the globe to release products to volume production.
- →Test strategy and DFT (Design for Testability) definition and implementation for new RF and Clocking products.
- →Comprehensive device debugging and design validation.
- →Drive for manufacturing efficiency with robust and cost-effective test solutions while being accountable for product quality.
Requirements
~1 min readMaster’s degree in Electronic Engineering OR Bachelor of Science degree in Electronic Engineering with 3 years of experience in test development engineering in semiconductor industry. Experience to include: 3 years with design the tester PCB; 3 years in developing test programs for semiconductor testing; 3 years using Teradyne Ultraflex or Advantest V93K platforms; and 3 years scripting and analyzing data collected from the testers.
Location & Eligibility
Listing Details
- Posted
- June 25, 2026
- First seen
- June 26, 2026
- Last seen
- June 26, 2026
Posting Health
- Days active
- 0
- Repost count
- 1
- Trust Level
- 42%
- Scored at
- June 26, 2026
Signal breakdown
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