CPU Circuit Design Engineer

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

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  Drives performance verification (PV) methodology and circuit / timing quality signoff for the CPU team.

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  Evaluates new process nodes through circuit simulations and/or block scaling methods, recommends frequency targets for the CPU with an early understanding of u-architectural growth.

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  Makes informed trade-offs between performance, power, area, and effort.

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  Works with design domains RTL/circuit/SD to converge to timing targets with no compromise on quality or schedule.

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  In addition to pre-silicon responsibilities, this individual will grow to own pre-to-post silicon VF correlation and drive debug of circuit marginality sightings.

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  Must demonstrate a track record of execution and design ownership in advanced process technologies.

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences. 

Bachelors & 6+ years or Masters & 4+ years in Electrical & Computer Engineering, Computer Engineering, Electrical Engineering or related field.

• 5+ years of CPU circuit or backend design experience.

• 5+ years of experience in circuit design and STA.

• In-depth circuit design knowledge and ability to make PPA tradeoff decisions.

• In-depth STA knowledge and circuit quality signoff criteria for tape-in.

• Ability to guide debug of post-silicon circuit marginality sightings.

• Ability to handle incomplete, fuzzy task definitions and drive them to closure.

• Hands on individual contributor who can delegate when necessary to meet stringent schedules.

• Led technical teams of 2-3 engineers.

• Self-motivated, team player and easy to work with.

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