SR ENGINEER, DESIGN
Quick Summary
• Own end-to-end development of logic features, from architecture definition through RTL implementation, verification, and post-silicon validation. • Translate system and firmware
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Design/Senior Design Engineer – NAND digital (NVE Engineering)
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
department Introduction
The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with cross-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes.
Position Overview
As a Logic Design Engineer in the NVEG organization at Micron Semiconductor Italia, you will play a key role in the definition, implementation, verification, and silicon validation of NAND Flash logic features.
In this role, you will act as a technical owner of complex logic functionalities, working at the intersection of architecture, firmware, datapath, analog, and test teams. You will contribute to new product pathfinding, ensure robust feature implementation across technology generations, and support silicon bring‑up, validation, and learning.
Responsibilities
Responsibilities include, but are not limited to:
• Own end-to-end development of logic features, from architecture definition through RTL implementation, verification, and post-silicon validation.
• Translate system and firmware requirements into micro-architecture specifications and robust digital implementations.
• Develop high-quality RTL and drive verification activities (block, subsystem, and full-chip), including coverage and post-layout validation.
• Collaborate with multi-functional teams to define interfaces, ensure integration quality, and optimize performance, power, and reliability.
• Support silicon bring-up, debug, and root-cause analysis, contributing to yield learning and product ramp.
AI Enablement and Productivity
The candidate is expected to leverage AI-powered tools and data-driven methodologies to improve engineering productivity, accelerate problem solving, support design analysis, and enhance technical decision making. Responsibilities may include:
• Using AI-assisted engineering tools for code generation, review, debug, and documentation.
• Applying AI-enabled analysis techniques to large design, verification, characterization, or silicon datasets.
• Finding opportunities to automate repetitive engineering tasks through AI technologies.
• Evaluating and adopting emerging AI capabilities to improve efficiency, quality, and innovation within the design process.
• Collaborating with multi-functional teams to integrate AI automated workflows into engineering activities.
Min Qualifications
• M.S. or Ph.D. in Electrical Engineering, Electronics, or a related field.
• Strong experience in digital logic design and verification for complex SoCs or memory products.
• Hands-on experience with RTL design, gate-level verification, and simulation methodologies.
• Solid understanding of system-level and micro-architectural design trade-offs (performance, power, reliability).
• Strong communication and problem-solving skills, with ability to work effectively in global multi-functional teams.
Preferred Qualifications
• Experience in NAND Flash or other non-volatile memory technologies.
• Familiarity with design automation, scripting (e.g., Python), or AI-assisted design approaches.
• Understanding of physical design flows and layout constraints.
• Experience supporting silicon validation, debug, and bring-up activities.
The base salary range that Micron estimates it could pay in for this position full-time is:
43.000,00 € - 74.000,00 € per year, with B3 CCNL Level.Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for the position.
In addition to base pay, the remuneration package also includes: eligibility for a variable plan subject to the personal achievement of objectives and the company's performance, and benefits, which -at the discretion of the company- currently include meal vouchers, corporate welfare, yearly allowance of remote working days, supplementary health insurance, life coverage, Employee Assistance Program. Please refer to this page to check our current benefit offering: EMEA Benefits
Requirements
~1 min readWe are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® brand. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers
Location & Eligibility
Listing Details
- Posted
- October 12, 2026
- First seen
- October 12, 2026
- Last seen
- October 12, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 51%
- Scored at
- October 12, 2026
Signal breakdown
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