Quick Summary
Overview
1. FPGA firmware design engineer for L10 AI server development. 2. Familiar with Verilog or VHDL. 3. Know-how for (1)LTPI: "LVDS Tunneling Protocol & Interface" between DC-SCM & HPM. (2)M-PESTI: Modular-Peripheral Sideband Tunneling Interface.
Technical Tools
Other
1. FPGA firmware design engineer for L10 AI server development.
2. Familiar with Verilog or VHDL.
3. Know-how for
(1)LTPI: "LVDS Tunneling Protocol & Interface" between DC-SCM & HPM.
(2)M-PESTI: Modular-Peripheral Sideband Tunneling Interface.
Location & Eligibility
Where is the job
Nantou City, Taiwan
On-site at the office
Who can apply
TW
Listing Details
- First seen
- May 6, 2026
- Last seen
- May 9, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 47%
- Scored at
- May 6, 2026
Signal breakdown
freshnesssource trustcontent trustemployer trust
External application · ~5 min on usiglobal's site
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