Principal HW/FPGA Engineer
Quick Summary
Apply your Hardware and FPGA DSP/Digital expertise to develop solutions to complex telecommunications challenges.
The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S.
Requirements
~2 min read- Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 8 years of prior relevant experience
- Experience with the architecture, implementation, and validation of telecommunications applications targeting hardware platforms (wireless/optical interfaces, signal conditioning, multi-FPGA processing fabrics, high-bandwidth interconnects, memory structures).
- Proven ability to design, implement, and document FPGA designs from system and component level specifications.
- Advanced experience in the development of cutting-edge hardware products (Wireless/network processing platforms, high-performance, low-power, reduced size, varied environment conditions).
- Experience providing reliable cost/schedule estimates for proposal activities
- Experience with planning and managing technical execution to meet schedule and cost targets
- The ability to obtain a U.S. Government Top-Secret SCI (TS/SCI) security clearance with polygraph after start is required.
- U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
- Strong comprehension of HDL programming languages such as VHDL, Verilog or SystemVerilog.
- Strong comprehension of FPGA development environments and FPGA development tool flows.
- Optimization of hardware development practices using AI-assisted methodologies.
- Experience working with SW development teams to interface with HW and FPGA products.
- Experience with creating basic software programs that can interface to HW and FPGA components during verification.
- Experience with the resolution of hardware integration and test issues in hands-on lab environments.
- Clear written and verbal communication skills and the ability to work independently and collaboratively in team environments.
- Existing TS/SCI clearance with polygraph (Active within the last 24 months)
Raytheon Company Managed by Collins Aerospace
At RTX, the world's largest aerospace and defense company, 185,000 great minds are united by purpose and inspired to make a difference solving the world’s most complex problems. With our three market leading businesses, world-class operations and investments in research and development, we offer capabilities and opportunity no one else can. Together, we push the boundaries of known science and find new ways to connect and protect our world.
Collins Aerospace is a leader in technologically advanced, intelligent solutions that help redefine the aerospace and defense industry. With a comprehensive portfolio and deep technical expertise, we help customers meet the demands of the global market. Join us and help shape the future of aerospace and defense.
Responsibilities
~1 min read- →Apply your Hardware and FPGA DSP/Digital expertise to develop solutions to complex telecommunications challenges. The key responsibilities for this position include:
- →Drive product architecture and technical decisions across engineering and business teams.
- →Lead cutting edge projects to design, implement, and optimize telecommunications solutions targeting the latest high-performance hardware platforms.
- →Lead internal and external partners to design and implement high-performance hardware products (HW systems, CCAs, FPGAs, antennas, cables).
- →Verify system and component level functionality in lab environments.
- →Support, enhance, and optimize existing HW products to meet customer objectives.
- →Provide mentorship to junior engineers
- →May travel up to 25%
Click on this link to read the Policy and Terms
What We Offer
~1 min readLocation & Eligibility
Listing Details
- Posted
- September 22, 2026
- First seen
- October 2, 2026
- Last seen
- October 2, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 33%
- Scored at
- October 2, 2026
Signal breakdown
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