H
Hpiq1mo ago
$130,000 – $215,000/yr

Senior Hardware Design Engineer, Devices

United StatesSan Franciscosenior
EngineeringHardware Design Engineer
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Quick Summary

Key Responsibilities

Power architecture responsibility for a wearable device covering SoC states, sensor, audio, and memory architecture tradeoffs at board level. Battery, PCM,

Technical Tools
EngineeringHardware Design Engineer

HP IQ is HP’s new AI innovation lab. Combining startup agility with HP’s global scale, we’re building intelligent technologies that redefine how the world works, creates, and collaborates.

We’re assembling a diverse, world-class team—engineers, designers, researchers, and product minds—focused on creating an intelligent ecosystem across HP’s portfolio. Together, we’re developing intuitive, adaptive solutions that spark creativity, boost productivity, and make collaboration seamless.

We create breakthrough solutions that make complex tasks feel effortless, teamwork more natural, and ideas more impactful—always with a human-centric mindset.

By embedding AI advancements into every HP product and service, we’re expanding what’s possible for individuals, organisations, and the future of work.

Join us as we reinvent work, so people everywhere can do their best work.

About the Role

~1 min read

HP IQ is seeking a Senior Hardware Design Engineer to support the design and development of low-power electronic devices. This role focuses on detailed schematic execution, validation, and debugging under the technical direction of senior engineers. The ideal candidate has strong circuit fundamentals, hands-on experience with schematic and layout tools, and a background working within well-defined engineering processes at top-tier organizations.

Responsibilities

~1 min read
  • Power architecture responsibility for a wearable device covering SoC states, sensor, audio, and memory architecture tradeoffs at board level.
  • Battery, PCM, and charging profile definition and validation
  • Design power experiments, test plans, and measurement & telemetry mechanisms across firmware and hardware to optimize power and performance.
  • Build and maintain system-level power models to model expected power consumption for user profiles. Map power models by subsystem, correlating modeled behavior with instrumented measurements.
  • Define user profiles, power and sleep states, and low-power operating modes
  • Partner closely with product, hardware, firmware, manufacturing, and regression QA to drive alignment and execution toward power targets.

Requirements

~1 min read
  • Bachelors or Masters of Science degree in Electrical Engineering, Computer Science, or Physics, or a related field; advanced degree preferred.
  • 5+ years of professional experience in electrical engineering and system architecture.
  • Strong understanding of circuit fundamentals, including low-power analog and high-speed signaling.
  • Hands-on experience with Cadence schematic capture and PCB layout tools.
  • Proven experience executing schematic design, validation, and debugging.
  • Ability to work effectively under technical direction and within cross-functional team,

Nice to Have

~1 min read
  • Experience leading or contributing to low-power consumer or medical electronic systems from concept through production.
  • Background at top-tier organizations with proven, mature hardware development practices.
  • Experience with small, space-constrained devices and power-sensitive designs.
  • Strong problem-solving skills with the ability to debug complex hardware issues efficiently.

Salary Range: $130,000 - $215,000

What We Offer

~1 min read
Health insurance
Dental insurance
Vision insurance
Long term/short term disability insurance
Employee assistance program
Flexible spending account
Life insurance
Generous time off policies, including;  4-12 weeks fully paid parental leave based on tenure
11 paid holidays
Additional flexible paid vacation and sick leave (US benefits overview)

HP IQ is HP’s new AI innovation lab, building the intelligence to empower humanity—reimagining how we work, create, and connect to shape the future of work.

  • Innovative Work
    Help shape the future of intelligent computing and workplace transformation.
  • Autonomy and Agility
    Work with the speed and focus of a startup, backed by HP’s scale.
  • Meaningful Impact
    Build AI-powered solutions that help people and organisations thrive.
  • Flexible Work Environment
    Freedom and flexibility to do your best work.
  • Forward-Thinking Culture
    We learn fast, stay future-focused, and imagine what comes next—together.

HP, Inc. provides equal employment opportunity to all employees and prospective employees, without regard to race, color, religion, sex, national origin, ancestry, citizenship, sexual orientation, age, disability, or status as a protected veteran, marital status, familial status, physical or mental disability, medical condition, pregnancy, genetic predisposition or carrier status, uniformed service status, political affiliation or any other characteristic protected by applicable national, federal, state, and local law(s).

Please be assured that you will not be subject to any adverse treatment if you choose to disclose the information requested. This information is provided voluntarily. The information obtained will be kept in strict confidence.

If you’d like more information about HP’s EEO Policy or your EEO rights as an applicant under the law, please click here: Equal Employment Opportunity is the Law Equal Employment Opportunity is the Law – Supplement

Listing Details

Posted
March 16, 2026
First seen
March 26, 2026
Last seen
April 16, 2026

Posting Health

Days active
21
Repost count
0
Trust Level
48%
Scored at
April 16, 2026

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H
Senior Hardware Design Engineer, Devices$130k–$215k