Intel Foundry Principal Engineer Overlay Development Engineer - Lithography

Logic Technology Development (LTD) is Intel Foundry's advanced technology engine, responsible for inventing, developing, and industrializing the process technologies that power future semiconductor products. From breakthrough device architectures and materials innovation to production-ready manufacturing solutions, LTD transforms research into customer-ready technologies that enable industry-leading performance at scale.

The Lithography Overlay Principal Engineer is responsible for overlay control innovation, defining key technology roadmaps, and leading complex technical projects to establish Intel's overlay leadership.

As a lithography overlay expert and technologist, you will be responsible for customization and addition of new features to base technologies to use in high volume manufacturing. Your expertise will focus on all aspects of improving overlay control.

Responsibilities:
LTD Principal Engineers are responsible for leading scientific research enabling the manufacture of innovative device architectures but not limited to:

• Lead scientific research enabling the manufacture of innovative device architectures coupled with the realization of these architectures.
• Designing, executing, and analyzing experiments necessary to meet engineering specifications for their process.
• Participate in the development of intellectual property.
• Integrate the many individual steps necessary for the manufacture of complex microprocessors.
• Ramp to manufacturing volumes to demonstrate the technology meets requirements while simultaneously transferring the technology to counterparts in manufacturing via the Copy Exactly Methodology. 
• Provide technical guidance and mentorship to junior engineers and researchers, fostering a culture of continuous learning and development.
• Drive the development and implementation of customized, cost-effective, competitive, overlay solutions, ensuring compatibility with Intel's existing manufacturing processes and platforms.
• Provide technical guidance and mentorship to junior engineers and researchers, fostering a culture of continuous learning and development.
• Stay updated with industry trends, emerging technologies, and customer needs to inform customization strategies and identify opportunities for improvement.

• Deep experience in lithography
• Broad experience in logic technology development, enhancement, and customization
• Current experience in advanced node overlay development processes.
• Proven ability to troubleshoot process impacts on overlay mark performance.
• Experience with integrated process development to co-optimize process flows and overlay mark design.
• Demonstrated proficiency in Design of Experiments (DOE), Statistical Process Control (SPC), and data analysis.
• Leadership skills with the ability to lead cross-functional teams and drive collaboration.
• Communication skills, both verbal and written, with the ability to convey complex technical concepts effectively.

• Experience driving integrated process change methodologies based on overlay impact analysis.
• Direct overlay equipment development experience and vendor engagement.
• Hands-on experience with ASML EUV and DUV scanner platforms.
• Strong capability to troubleshoot complex process and production issues at advanced nodes.
• Deep working knowledge of lithography equipment operation, including automation and process control systems.
• Familiarity with factory automation or manufacturing execution and control systems.

• Degree in in Materials Science, Chemical Engineering, Chemistry, Physics, Mechanical Engineering, Electrical Engineering, or a related STEM discipline.
• Bachelor's degree with 12+ years, Master's degree with 10+ years, or Ph.D. with 7+ years of experience.
• 7+ years of hands-on lithography experience.

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