Ocotillo Failure Analysis Engineer – TEM/Probing Engineer
Quick Summary
• Operate general failure analysis tools in the labs, such as TEM, SEM, optical scopes.
You must possess the below minimum qualifications to be initially considered for this position.
The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.
Join us as a Manufacturing Failure Analysis Engineer, where you'll play a pivotal role in ensuring the quality and reliability of Intel's next-generation silicon, product, package, platforms, and board process technologies. You will identify failures, conduct root cause analyses, and develop innovative methodologies to enhance performance and yield. By leveraging your expertise, you'll contribute to driving manufacturing innovation and supporting the delivery of world-class products. The ideal candidate brings hands-on experience in probing, strong understanding of device behavior, and the ability to independently execute complex debug workflows.
Business group
You will be part of Intel's manufacturing organization, a cornerstone of our operations that focuses on advancing semiconductor process technologies and ensuring product excellence. This team is dedicated to delivering high-quality solutions that support Intel's broader mission to create groundbreaking technologies that power the future.
Key Responsibilities:
• Operate general failure analysis tools in the labs, such as TEM, SEM, optical scopes.
• Perform electrical probing and advanced characterization on silicon devices (wafer-level and site-specific structures)
• Set up, operate, and troubleshoot probe stations and electrical measurement systems.
• Execute complex test plans and interpret schematics, layouts, and device structures to support failure analysis workflows.
• Analyze electrical data (e.g., IV, CV, leakage, shorts/opens) to support fault isolation and root cause identification.
• Partner with FA engineers to integrate probing with SEM, FIB/PFIB, and TEM-based workflows.
• Drive improvements in probing methods, workflows, and best-known methods (BKMs)
• Provide technical guidance to junior engineers and technicians on probing techniques and lab practices.
• Support tool ownership activities including troubleshooting, calibration, and uptime improvement.
• Participate in lab sustaining, process transfer, and cross-functional yield improvement initiatives.
Requirements
~1 min readYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Location & Eligibility
Listing Details
- Posted
- September 24, 2026
- First seen
- September 26, 2026
- Last seen
- September 26, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 56%
- Scored at
- September 26, 2026
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