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Project Design Lead (EX)

United StatesUnited States·San Joselead
OtherDesign Lead
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Quick Summary

Overview

Project Design Lead, Nexperia USA Inc., San Jose, CA: Design digital logic circuits for integration into mixed-signal integrated circuits (ICs), including finite state machines, control logic,

Technical Tools
OtherDesign Lead

Design digital logic circuits for integration into mixed-signal integrated circuits (ICs), including finite state machines, control logic, data path components, and interface blocks, based on product requirements and system architecture specifications. Perform static design verification including Lint checking to ensure code quality, Clock Domain Crossing (CDC) analysis to validate synchronization of asynchronous clocks and Reset Domain Crossing (RDC) analysis to confirm correct handling of resets across domains. Analyze simulation, synthesis, and timing reports to validate design quality and correct operation under different process-voltage-temperature (PVT) conditions. Conduct applied research into machine learning (ML) or artificial intelligence (AI) techniques for the purpose of improving digital design and verification flows, including automation of test generation, design space exploration, and bug triage. Translate system and product definition documents into digital architecture, block-level specifications, and micro-architecture definitions, and document digital design implementation details. Generate behavioral models of analog or mixed-signal components using high-level modeling techniques (e.g., SystemVerilog, Verilog-A) to enable mixed-signal simulation and validate digital-analog interaction early in the design process. Build Field Programmable Gate Array (FPGA) prototypes for digital logic emulation, perform functional tests using application-level scenarios, and collaborate with firmware teams for pre-silicon validation and debugging. Participate in post-silicon bring-up by analyzing lab measurements and test data, identifying root causes of issues, comparing silicon behavior with simulation models, and recommending fixes or design changes. Develop scripts, ML models, or AI-based tools to optimize verification workflows, automate debugging tasks, extract features from simulation datasets, and enhance RTL code quality and coverage metrics. Collaborate with cross-functional teams including analog designers, system engineers, software developers, and CAD/methodology engineers to define requirements and integrate AI-enhanced solutions into production design workflows.

Full time employment, Monday – Friday, 40 hours per week, $188,760.00 per year.

Requirements

~1 min read

Must have a Master’s degree in Electrical Engineering, Computer Engineering, or a related field and 2 years of experience in digital integrated circuit (IC) design and verification.

As an equal-opportunity employer, Nexperia values diversity not just because it is the right thing to do but because diverse teams perform better. We are dedicated to being inclusive, and a proof point of this dedication is that we were the main partner of the very first Dutch Paralympic Team NL House during the Paris 2024 Paralympic Games. Our recruitment process is inclusive and accessible to all, and we consider all applicants fairly, as well as providing a safe work environment and reasonable adjustments where requested.

In addition, we offer our colleagues the possibility to join employee resource groups such as the Pride Network Group or global and local Women's groups. Nexperia is committed to increasing women in management positions to 30% by 2030.

Location & Eligibility

Where is the job
San Jose, United States
On-site at the office
Who can apply
US

Listing Details

First seen
October 3, 2026
Last seen
October 3, 2026

Posting Health

Days active
0
Repost count
0
Trust Level
51%
Scored at
October 3, 2026

Signal breakdown

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Project Design Lead (EX)