Founding Silicon Engineer

The future will have more chips, in more varieties, for more applications than ever before. The current way of designing, testing, and manufacturing them can't keep up. Outdated chip development processes are the present rate limiter on humanity's future. Bronco's mission is to keep Moore's law going by building AI agents that automate large swaths of repetitive chip verification and design.

We're deployed alongside verification teams at some of the largest chip companies in the world, supporting production SoC designs at leading-edge process nodes.

We are backed by tier-1 Silicon Valley investors with deep relationships across the semiconductor industry.

As a Founding Silicon Engineer, you will be the domain backbone of Bronco's AI agents. You'll contribute to the architecture of our reasoning systems, drive tool integrations with industry-standard EDA environments, and shape product direction based on what you know from the inside — the workflows, pain points, and failure modes that only come from real verification experience.

This role puts you at the intersection of AI and silicon at a unique moment. You'll have a front row seat into a diverse range of chip projects across the industry — from AI accelerators to SoCs to custom silicon — and you'll be fundamentally changing how chips are made. The ideal candidate is an experienced silicon or verification engineer who has spent real time inside industry CAD flows. We have a strong preference for founding engineers, early-stage engineers, and past founders.

• →Contribute to the architecture of Bronco's domain-specific reasoning systems — defining task structure, expected agent behavior, and quality criteria across DV workflows
• →Own and expand tool integrations between Bronco's AI and EDA environments — simulators, coverage tools, linters, and formal verification platforms
• →Work hands-on with CAD and EDA tooling to build, test, and validate AI-generated outputs against real verification environments
• →Deploy and integrate Bronco into customer workflows, working directly alongside verification teams at leading chip companies
• →Feed onsite learnings back into product direction and tool integration roadmap

• You are an exceptional engineer who can solve any problem
• 2+ years of experience in ASIC/SoC design and verification
• Hands-on familiarity with industry-standard EDA tooling — Synopsys, Cadence, Questa, or equivalent
• Strong expertise in digital verification, SystemVerilog, and UVM
• Proficiency in scripting languages and programming (Python, Tcl, Perl, or equivalent)
• Excellent debugging skills across simulation, waveform analysis, and coverage closure
• Strong communication and collaboration abilities

• Experience deploying or integrating EDA tools into automated flows or CI pipelines
• Exposure to formal verification methods
• Interest in AI and machine learning applications in chip design
• Experience working at a startup or in a high-ownership engineering environment