Power Architecture for Power Consumption, Optimization and Strategy

#WeAreIn to challenge technology frontiers by creating leading-edge architectures. Are you in? Power Consumption Engineer to own the power budget for next-gen SoC designs. You will bridge the gap between IP owners and system architects, defining and maintaining power targets, driving low-power strategies, and ensuring signoff for complex power management features. Your input will be key for the creation of highly power efficient automotive microcontrollers. If you thrive on balancing technical analysis with cross-functional leadership, this is your role. Your Role Key responsibilities in your new role You will bridge the gap between IP owners and system architects, defining and maintaining power targets, driving low-power strategies, and ensuring signoff for complex power management features. Your input will be key for the creation of highly power efficient automotive microcontrollers. * Define and negotiate power consumption targets per IP and HW partition in collaboration with IP owners and SoC implementation teams. * Lead Model HW analysis for leakage/dynamic power optimization and support thermal analysis for SoC targets * Own end to end responsibility for the power consumption from the SoC architectural definition to the power silicon measurements * Partner with concept and system design to make the right platform decisions in terms of power saving techniques * Manage power signoff, deliver power data, and maintain power targets throughout the design lifecycle * Own and enhance internal Power Target Setting and Power Estimator tools to streamline workflows * Serve as Power Track Lead, maintaining Scrum dashboards, and collaborate within the Power Focus Team and Yield Analysis groups * Address unplanned power challenges with data-driven solutions Your Profile Qualifications and skills to help you succeed * Minimum 15+ years of relevant industry experience in semiconductor or related domains * Deep expertise in low-power design techniques, including clock gating, power gating, multi-Vt optimization, and dynamic voltage scaling/regulation (DVS/DVR) * Strong hands-on experience across the full digital design lifecycle--design, verification, synthesis, and physical layout. * Proven experience with power estimation tools and ability to correlate with thermal analysis and silicon behavior * Strong capability in tool automation, quality checks, and workflow optimization * Experience leveraging AI/ML-based approaches and scripting languages (such as Python, Tcl, or similar) to drive efficiency and data insights * Excellent stakeholder management skills, with the ability to align IP teams and cross-functional groups to meet system-level power budgets * Demonstrated ability to lead power optimization tracks within Agile/Scrum development environments * Strong analytical mindset with a focus on data-driven decision-making * Experience in interpreting complex datasets to drive design improvements and ensure power/performance targets Contact: Gowri Shenoy, LinkedIn #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.