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ROCKET LOT ALPHA - Principal Engineer Digital Design

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OtherPrincipal Engineer
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Overview

The Multi Phase controller IP Lead is responsible for end-to-end definition, execution,

Technical Tools
OtherPrincipal Engineer
The Multi Phase controller IP Lead is responsible for end-to-end definition, execution, and delivery of a control- and filter-centric signal processing digital IP that interfaces with high complexity AFEs. This role drives architecture closure across algorithm intent, fixed-point implementation, RTL micro-architecture, register/bus interfaces, verification strategy, and implementation readiness. The IP Lead aligns System modelling, Analog, RTL, DV, and DMS/AMS teams to ensure the IP meets functional, performance, latency, quality, and integration goals. Your Role Key responsibilities in your new role Technical Ownership * Own end-to-end IP definition from requirements through architecture, implementation, verification, and handoff. * Translate system and product requirements into a clear IP micro-architecture and execution plan. * Drive closure on algorithm intent, control behavior, filter architecture, latency budgets, and implementation trade-offs. * Review and converge control/filter algorithm definition, sampling intent, and expected behavior with signal-processing architects. * Drive fixed-point architecture decisions including numeric precision, dynamic range, saturation, rounding, scaling, and pipeline placement. * Oversee RTL architecture for filter data path, coefficient programming, update paths, loop delays, state machines, and control logic. * Own top-level design decisions affecting timing, CDC, reset strategy, area, power, and implementation robustness. * Guide register architecture, status/control visibility, firmware programmability, and system integration behavior. * Drive architecture and RTL for AHB/PM Bus/AVS or other system-facing interfaces, including arbitration and error handling. * Define verification goals and signoff expectations jointly with DV and AMS verification leads. * Ensure availability of golden models, bit-true checking strategy, coverage goals, and end-to-end latency checks. * Drive closure on corner cases including overflow, convergence, saturation recovery, limit cycles, reset behavior, and protocol exceptions. * Ensure analog assumptions, abstraction boundaries, and mixed-signal interaction points are verified appropriately. * Review and close functional gaps across RTL, DV, DMS/AMS, and system validation. * Break down execution into work packages, milestones, dependencies, and risk mitigation plans. Your Profile Qualifications and skills to help you succeed * Bachelor’s or Master’s degree in Electrical Engineering, * Strong experience leading digital or mixed-signal-adjacent IP development. * Strong understanding of control loops, DSP/filter implementations, or fixed-point digital signal processing. Contact: VidhiAshok.Thakkar@infineon.com #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

Location & Eligibility

Where is the job
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Listing Details

Posted
June 11, 2026
First seen
June 11, 2026
Last seen
June 11, 2026

Posting Health

Days active
0
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0
Trust Level
51%
Scored at
June 11, 2026

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infineonROCKET LOT ALPHA - Principal Engineer Digital Design