Senior FPGA Engineer
Quick Summary
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit.
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and others – with an additional $500M in signed contracts across commercial and US government customers – we’re mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.
The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today’s and tomorrow’s massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.
With multiple launches planned through 2026 and 2027, we're Building Bigger to develop the solar system and become a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a groundbreaking Series C space startup, we’d love for you to apply.
The software team at K2 strives to blur the lines between the various types of software development and encourages team members to get into parts of the stack they may not otherwise have experience with. This spectrum includes HDL programming (VHDL, SystemVerilog), embedded software on microcontrollers (Rust, C++), operating systems (Rust, C++, C), application software on flight computers (Rust, C++), GNC algorithms (Rust, C++), to test systems (Python), and many things inbetween. By doing this, we create a stronger team with more capable engineers. For now, this does not include front-end, artificial intelligence, or machine learning development.
As a part of the team, you will be responsible for the development and verification of FPGA firmware used to fly some of the largest spacecraft that have ever been flown. You will be able to write mission-critical code that controls propulsion systems, attitude control systems, RF systems, and power systems to ensure safe and reliable operation of the vehicle. In your first 6 months you will work with your team to develop core pieces of the FPGA architecture such as the strategies for fault tolerance, real-time control, high-speed data routing, and telemetry downlink. In your first year you will implement larger and more complex FPGA systems and begin verifying your code using both software and hardware in the loop simulators. In your first two years you will operate your code on multiple spacecraft, demonstrating robust performance in demanding missions.
Responsibilities
~1 min read- →Own the architecture and implementation of critical programmable logic systems across the spacecraft that support vehicle networking, RF systems, and real-time control of all spacecraft subsystems
- →Implement these architectures in RTL using VHDL and SystemVerilog
- →Verify and validate FPGA designs using a mix of simulation, bench-testing, and Hardware In The Loop testbeds
- →Support integration, test, and troubleshooting efforts for FPGA designs across all levels of the spacecraft development and manufacturing
- →Develop the tools and infrastructure to support rapid, high-reliability FPGA solutions across all subsystems
Requirements
~1 min read- Bachelor's degree in computer science, computer engineering, electrical engineering, math, or a STEM discipline or 3+ years of professional experience in software development
- 3+ years working with complex FPGA designs spanning digital, mixed signal, or RF applications
- Development experience with VHDL or SystemVerilog
Nice to Have
~1 min read- Experience integrating logic onto Xilinx SoC platforms
- Experience with digital signal processing (DSP) fundamentals and implementing complex DSP logic and software defined radios on FPGAs
- Experience implementing high-speed SERDES interfaces such as Ethernet, PCIe, and JESD204C.
- Experience with standard bus and streaming protocols such as AXI and AXI-Stream
- Experience with evaluating and integrating vendor/third party IP
- Experience with common scripting languages such as Python, TCL, and Bash
- Experience with Linux systems programming and driver development
- Experience with continuous integration and continuous delivery systems
- Experience building or working with hard real-time embedded systems (bare-metal or RTOS)
- Basic knowledge of electronics, computer architecture, and control systems
- Experience with software verification and testing methods
- Experience with software and network performance analysis and debugging
What We Offer
~1 min readAs defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.”
The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.
K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Listing Details
- Posted
- March 25, 2026
- First seen
- March 26, 2026
- Last seen
- April 17, 2026
Posting Health
- Days active
- 21
- Repost count
- 0
- Trust Level
- 48%
- Scored at
- April 17, 2026
Signal breakdown
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