$120,000 – $225,000/yr

Design Verification Engineer

United StatesAustinFull-timemid
OtherDesign Verification Engineer
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Quick Summary

Requirements Summary

At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our custom dataflow architecture that is the backbone of our chip design.

Technical Tools
OtherDesign Verification Engineer
We’re hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.

About Us:
Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.

We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.

The salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.

Design Verification at Mythic:
At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our custom dataflow architecture that is the backbone of our chip design. DV engineers collaborate with many teams, including RTL design, architecture modeling, custom analog IP, compiler, emulation and post-silicon to ensure the full system operates as intended. Because today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.
  • Hands on system-level and block-level verification.
  • Development of test plans and coverage plans.
  • Testbench development and execution using UVM or other advanced DV methodologies.
  • Creation of verification infrastructure and flows.
  • Leverage architecture models and emulation environments to help verify large AI network functionality on the design.
  • Further responsibilities will depend on background and skills.
  • Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 3+ years of industry experience developing verification testbenches.
  • Knowledge of verification methodologies.
  • Knowledge of computer architecture.
  • Understanding of Verilog, SystemVerilog, and UVM.
  • Proven track record of first-pass silicon success.
  • Strong communication skills, both written and spoken.
  • Listing Details

    Posted
    September 25, 2025
    First seen
    March 26, 2026
    Last seen
    April 21, 2026

    Posting Health

    Days active
    25
    Repost count
    0
    Trust Level
    37%
    Scored at
    April 21, 2026

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    Design Verification Engineer$120k–$225k