$180,000 – $220,000/yr

Power Management Integrated Circuit (PMIC) Controls Engineer

United StatesTorrance · TorranceHybridmid
Engineering
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Quick Summary

Technical Tools
Engineering

Red Cell Partners is an incubation firm building and investing in rapidly scalable technology-led companies that are bringing revolutionary advancements to market in three distinct practice areas: healthcare, cyber, and national security. United by a shared sense of duty and deep belief in the power of innovation, Red Cell is developing powerful tools and solutions to address our Nation’s most pressing problems.

Claros innovates at the intersection of power and compute. We build advanced semiconductor power management solutions that improve AI compute capacity, efficiency and reliability. Claros is an early-stage startup company located in Torrance, CA. If you are looking for challenging work and a strong technical environment with the collaborative & supportive culture, then Claros Tech is the company for you. We offer industry the best competitive pay & benefits and early-stage stock options. 

We are open-minded, fast paced, problem solvers that value open dialogue and candor. Our passion is to challenge the status-quo and we embrace transformational thinking.  Our response is never “no, but….” instead “yes, if….”.  We are mindful of our personal and organizational blinders and try to build an environment where our team members are At Their Best. 

About the Role

~1 min read

Claros Inc. is seeking to hire an exceptional  Power Management Integrated Circuit (PMIC) Controls Engineer to join our ASIC team in Torrance, CA. Candidate must be self-motivated individual to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering PMICs (Low-dropout (LDO) linear voltage regulators, Switching regulators, DC-DC Buck Converters), ADC/DAC, PLL, Gate Drivers, and PMIC chip integration). As a Senior level  role you'll play a crucial role in system level strategies of Power management ICs from concepts into release to production, collaborating closely with other circuit designers, and leveraging sophisticated tools.  

Responsibilities

~1 min read

In this role, you will be responsible for developing the algorithms for power sequencing, voltage scaling and implementing control loops for stability for PMICs used in a range of applications. 

  • Collaborate with other engineers to define and implement design methodologies and best practices for PMIC design and related areas. 
  • Work with multi-disciplinary teams including control, systems, testing to implement new ideas and in writing the specifications, design, characterization, verification and documentation.  
  • Summarize and interpret results of highly complex performance checks and review it with team. 
  • Use problem solving skills, experience, and supervise the layout circuit designers. Guide them with floor planning and in resolving DRC/LVS errors.  
  • Behavior and transistor level circuit design, simulation and verification of power management blocks including LDO, Switch Mode Power Supplies (buck, boost), voltage reference and other analog circuits meeting power, performance and area specifications. 
  • Work closely with PCB layout engineers to ensure performance and quality of the designs.  
  • Work with team on best packaging approach for design and test.  
  • Datasheet drafting and reviews. 
  • Work with product managers to develop the next generation of products. 
  • Bachelor’s degree in electrical engineering with 3+ years of overall experience in analog/mixed signal IC Design. 
  • Knowledge of semiconductor manufacturing processes and their impact on analog circuit design. Experience in designing circuits in High voltage (BCD) technology processes and FinFET technology (like 12nm and below) is preferred. 
  • Strong background in Power Management and circuit design principles, Buck or switching cap based topology, power converter control theory (voltage mode/current mode, PWM/PFM), Mixed Signal Design, Gate Drivers, PLL & Clock Chip Design. 
  • Must have released at least one full IC design from Concept to release to production. 
  • Good knowledge in device physics and device reliability analysis. 
  • Proficiency in using Cadence IC Design Tools. 
  • Familiarity with industry standard interface protocols such as SPI, I2C, PMBus/SMBus. 
  • Ability to document design techniques, test and verification methodology. 
  • Conduct design reviews, analyze and debug circuits, and perform system-level testing to validate performance and ensure compliance with specifications. 
  • Full chip integration and Top-Level Simulations. 
  • Strong analytical and problem-solving skills, with the ability to debug complex issues. 
  • Excellent communication and collaboration skills to work effectively in a team environment. 
  • Ability to effectively prioritize and execute tasks in a high-pressure environment. 
  • Master’s degree or higher.
  • Digital control theory
  • Experience using Matlab/simulink
  • Knowledge in writing Verilog/VHDL modeling. 
  • Experience with layout design, layout review, and layout versus schematic (LVS) verification. 

What We Offer

~1 min read
Career track opportunity with potential for rapid advancement with strong performance as the firm grows.
100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.
Paid maternity and paternity for 14 weeks at employees' normal pay.
Unlimited PTO, with management approval.
Opportunities for professional development and continued learning.
Optional 401K, FSA, and equity incentives available.

What We Offer

~2 min read
Career track opportunity with potential for rapid advancement with strong performance as the firm grows
100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.
Paid maternity and paternity for 14 weeks at employees' normal pay.
Unlimited PTO, with management approval.
Opportunities for professional development and continued learning.
Optional 401K, FSA, and equity incentives available.
Mental health benefits are available through Tara Mind.
Cost effective GLP-1 solutions available through Crux.
Managing and administering your application throughout the hiring process;
Verifying the accuracy and authenticity of application materials, including by cross-referencing information you provide against publicly available sources and proprietary databases;
Identifying indicators of potentially fraudulent, fabricated, or materially misleading application content, including but not limited to discrepancies between submitted materials and publicly available professional profiles, geographic anomalies, and fabricated work histories.

Listing Details

Posted
March 30, 2026
First seen
March 26, 2026
Last seen
April 17, 2026

Posting Health

Days active
22
Repost count
0
Trust Level
54%
Scored at
April 17, 2026

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Power Management Integrated Circuit (PMIC) Controls Engineer$180k–$220k