ASIC/SoC Design & Verification Engineer

• Hands-on experience in ASIC and/or SoC design, functional verification, or digital hardware development, preferably involving production silicon or tapeout projects.
• Strong proficiency in SystemVerilog and Verilog.
• Experience working with industry-standard EDA tools such as Synopsys VCS, Cadence Xcelium, Siemens Questa, VC Formal, Verdi, or equivalent open-source tools including Icarus Verilog, Verilator, Cocotb, Yosys, and OpenROAD.
• Strong understanding of system-level hardware concepts including interface protocols, clock-domain crossing (CDC), handshaking, backpressure, and multi-module data flow.
• Deep expertise in one or more of the following areas:
• RTL Design and Microarchitecture
• Functional Verification (UVM, SVA, Cocotb, testbench development)
• IP Integration and SoC Bring-up (AXI, PCIe, DDR, NoC, ARM-based systems)
• Formal Verification and Coverage Closure
• Timing Closure, Synthesis, Power, Performance, and Area (PPA) Optimization
• Analog/Mixed-Signal Design Verification
• Hardware Specification Development and Technical Documentation
• Ability to commit 20–40 hours per week with reliable weekday availability.
• Strong written communication skills and the ability to work independently in a remote environment.

• Experience participating in AI model training, evaluation, data annotation, or technical benchmarking projects.
• Graduate research or industry experience in semiconductor design, verification, or computer architecture.
• Familiarity with modern AI-assisted engineering tools and automated hardware design workflows.
• Experience mentoring engineers or reviewing complex technical designs.

• →Design realistic chip architecture, RTL, debugging, and verification challenges based on real engineering experience.
• →Develop complete reference solutions, including RTL implementations, verification environments, testbenches, and supporting documentation using Verilog/SystemVerilog.
• →Evaluate AI-generated hardware solutions, identify strengths and weaknesses, and provide detailed technical feedback.
• →Analyze where AI models struggle with hardware engineering concepts, debugging, verification strategies, and design trade-offs.
• →Collaborate with fellow hardware engineers to maintain consistency, technical accuracy, and high-quality engineering standards across all evaluation tasks.
• →Help improve AI understanding of modern digital design methodologies, verification practices, and semiconductor development workflows.

We are committed to creating an inclusive environment and welcome applications from qualified professionals of all backgrounds. Reasonable accommodations are available throughout the application and engagement process.

• Independent contractor engagement.
• Fully remote with flexible working hours.
• Expected commitment of approximately 20–40 hours per week.
• Project duration may be extended, shortened, or concluded based on project requirements and individual performance.
• Work does not require access to confidential or proprietary information from any current or former employer.
• Payments are issued weekly based on approved work completed.
• At this time, we are unable to support H1-B or STEM OPT candidates.